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ACDRC Front-End Workshop
31 Oct 2025-02 Nov 2025 09:00-16:00
After the success of the spring April school dedicated to EDA tools, we cordially invite you to another 3-day intensive autumn school dedicated this time to Front-End design of digital integrated circuits taught by Prof. Yu-Guang Chen (NTHU).
This course provides a comprehensive overview of digital logic optimization techniques essential for integrated circuit (IC) design. It covers both foundational theory, including Boolean representation methods (ROBDD, ITE) and classical two-level optimization (Quine-McCluskey, Petrick's Method), alongside advanced multi-level optimization strategies (Kernels, Boolean Division). Practical application is emphasized through labs focusing on algorithm implementation and hands-on experience with industry-standard open-source tools like ABC. Participants will gain a deep understanding of optimizing digital circuits for efficiency and performance within the IC design flow.
- Place
- FEL ČVUT v Praze, kat. mikroelektroniky
- Online event URL
- https://forms.gle/3zdM2eXKVm9Sr3E28
- Organizer
- Katedra mikroelektroniky FEL ČVUT v Praze
- Contact person
- Ing. Vladimír Janíček, Ph.D., janicev@fel.cvut.cz, +420224355854
- More information
- https://forms.gle/3zdM2eXKVm9Sr3E28